Tenth International Conference on VLSI Design

Tenth International Conference on VLSI Design

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The TCG will have one node for every fan out in the circuit, and hence the number of vertices in the TCG is equal to the sum of ... a cell ON or OFF (base gate delay), (2) Delay due to charging or discharging the fan out and load capacitance (fan out delay), and, ... where, the input pad IPAD, is the transitive fan in of only the sequential cell LATCH, and has no other interconnection with the rest of the circuit.

Title:Tenth International Conference on VLSI Design
Publisher:IEEE Computer Society - 1997-01-01

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